onsemi MC100EPT26DTG, Logic Level Translator Translator 2 LVPECL/LVDS to LVTTL, 8-Pin TSSOP

The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the 1:2 fanout design of the EPT26 makes it Ideal for applications which require the low skew duplication of a signal in a tightly packed PC board. The VBB output allows the EPT26 to be used in a single-ended input mode. In this mode the VBB output is tied to the D0bar input for a non-inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01 uF capacitor.

• 1.4ns Typical Propagation Delay
• Maximum Frequency > 275 MHz Typical
• The 100 Series Contains Temperature Compensation
• Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
• Open Input Default State
• Safety Clamp on Inputs
• 24mA TTL outputs
• Q Outputs will default LOW with inputs open or at VEE VBB Output