Technical documents
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
Please check again later.
₪ 2.923
Each (Supplied on a Reel) (ex VAT)
₪ 3.42
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
10
₪ 2.923
Each (Supplied on a Reel) (ex VAT)
₪ 3.42
Each (Supplied on a Reel) (inc. VAT)
Production pack (Reel)
10
Buy in bulk
quantity | Unit price | Per Reel |
---|---|---|
10 - 40 | ₪ 2.923 | ₪ 29.23 |
50 - 190 | ₪ 2.503 | ₪ 25.03 |
200 - 490 | ₪ 2.237 | ₪ 22.37 |
500+ | ₪ 1.972 | ₪ 19.72 |
Technical documents
Specifications
Brand
Texas InstrumentsMounting Type
Surface Mount
Package Type
TSSOP
Pin Count
16
Dimensions
5 x 4.4 x 1.15mm
Maximum Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+85 °C
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22