Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Height
1.15mm
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Width
1.6mm
Length
2.9mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
₪ 64.50
₪ 2.58 Each (In a Pack of 25) (ex VAT)
₪ 75.46
₪ 3.019 Each (In a Pack of 25) (inc. VAT)
25
₪ 64.50
₪ 2.58 Each (In a Pack of 25) (ex VAT)
₪ 75.46
₪ 3.019 Each (In a Pack of 25) (inc. VAT)
25
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Please check again later.
quantity | Unit price | Per Pack |
---|---|---|
25 - 100 | ₪ 2.58 | ₪ 64.50 |
125 - 475 | ₪ 2.22 | ₪ 55.50 |
500 - 1225 | ₪ 1.98 | ₪ 49.50 |
1250+ | ₪ 1.755 | ₪ 43.88 |
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Schmitt Trigger Buffer
Number of Channels
1
Schmitt Trigger Input
Yes
Input Type
Single Ended
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOT-23
Pin Count
5
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
5 ns @ 5 V
Dimensions
2.9 x 1.6 x 1.15mm
Maximum Operating Supply Voltage
5.5 V
Propagation Delay Test Condition
50pF
Minimum Operating Temperature
-40 °C
Height
1.15mm
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Width
1.6mm
Length
2.9mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22