Technical documents
Specifications
Brand
MicrochipMaximum Frequency
70MIPS
Series
dsPIC33EP
Device Million Instructions per Second
70MIPS
Data Bus Width
16bit
RAM Size
2 kB
Instruction Set Architecture
Harvard
Program Memory Size
16 kB
Program Memory Type
Flash
Numeric and Arithmetic Format
Fixed Point, Floating Point
Mounting Type
Surface Mount
Package Type
UQFN
Pin Count
28
Typical Operating Supply Voltage
3 to 3.6 V
Number of UART Channels
1
Pulse Width Modulation
1 (6 x 16 bit)
Number of SPI Channels
1
USB Channels
0
Number of Ethernet Channels
0
Number of Timers
3
Number of I2C Channels
1
Number of PCI Channels
0
ADC Resolution
12bit
Minimum Operating Temperature
-40 °C
PWM Resolution
16bit
Number of CAN Channels
0
ADC Channels
12
Number of ADC Units
1
Maximum Operating Temperature
+85 °C
Number of PWM Units
1
Length
4mm
ADCs
1 (12 x 12 bit)
Timer Resolution
16bit
Height
0.55mm
Number of LIN Channels
0
PWM Channels
6
Width
4mm
Number of USART Channels
0
Timers
2 x 32 bit, 3 x 16 bit
Dimensions
4 x 4 x 0.55mm
Product details
dsPIC33EPxxGS202 Digital Signal Controllers
The Microchip dsPIC33EP family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC33EPxxGS202 range of devices are peripheral-rich DSCs designed to meet the needs of Switched Mode Power Supply (SMPS) and Digital Power Conversion applications.
These devices feature interconnected SMPS peripherals that reduce requirements placed upon the CPU, improving performance.
Microcontroller Features
70 MIPS Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL Plus Hardware Divide
32-Bit Multiply Support
Two Additional Working Register Sets (reduces context switching)
±0.9% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.5 mA/MHz Dynamic Current (typical)
10 μA IPD Current (typical)
In-Circuit and In-Application Programming
Peripheral Features
High Speed 12-bit 3.25 Msps ADC Module with 3 ADC Cores
Three PWM Generators - two outputs per generator
Two Rail-to-Rail Comparators with Hysteresis
Two Programmable Gain Amplifiers (PGAs)
One UART module
One 4-Wire SPI module
One I2C module (up to 1 Mbaud) with SMBus Support
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₪ 14.991
Each (In a Pack of 2) (ex VAT)
₪ 17.539
Each (In a Pack of 2) (inc VAT)
2
₪ 14.991
Each (In a Pack of 2) (ex VAT)
₪ 17.539
Each (In a Pack of 2) (inc VAT)
2
Technical documents
Specifications
Brand
MicrochipMaximum Frequency
70MIPS
Series
dsPIC33EP
Device Million Instructions per Second
70MIPS
Data Bus Width
16bit
RAM Size
2 kB
Instruction Set Architecture
Harvard
Program Memory Size
16 kB
Program Memory Type
Flash
Numeric and Arithmetic Format
Fixed Point, Floating Point
Mounting Type
Surface Mount
Package Type
UQFN
Pin Count
28
Typical Operating Supply Voltage
3 to 3.6 V
Number of UART Channels
1
Pulse Width Modulation
1 (6 x 16 bit)
Number of SPI Channels
1
USB Channels
0
Number of Ethernet Channels
0
Number of Timers
3
Number of I2C Channels
1
Number of PCI Channels
0
ADC Resolution
12bit
Minimum Operating Temperature
-40 °C
PWM Resolution
16bit
Number of CAN Channels
0
ADC Channels
12
Number of ADC Units
1
Maximum Operating Temperature
+85 °C
Number of PWM Units
1
Length
4mm
ADCs
1 (12 x 12 bit)
Timer Resolution
16bit
Height
0.55mm
Number of LIN Channels
0
PWM Channels
6
Width
4mm
Number of USART Channels
0
Timers
2 x 32 bit, 3 x 16 bit
Dimensions
4 x 4 x 0.55mm
Product details
dsPIC33EPxxGS202 Digital Signal Controllers
The Microchip dsPIC33EP family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC33EPxxGS202 range of devices are peripheral-rich DSCs designed to meet the needs of Switched Mode Power Supply (SMPS) and Digital Power Conversion applications.
These devices feature interconnected SMPS peripherals that reduce requirements placed upon the CPU, improving performance.
Microcontroller Features
70 MIPS Max. CPU Speed
Code-Efficient (C and Assembly) Architecture
Two 40-Bit Wide Accumulators
Single-Cycle (MAC/MPY) with Dual Data Fetch
Single-Cycle Mixed-Sign MUL Plus Hardware Divide
32-Bit Multiply Support
Two Additional Working Register Sets (reduces context switching)
±0.9% Internal Oscillator
Programmable PLLs and Oscillator Clock Sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer (WDT)
Fast Wake-up and Start-up
Low-Power Management modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
0.5 mA/MHz Dynamic Current (typical)
10 μA IPD Current (typical)
In-Circuit and In-Application Programming
Peripheral Features
High Speed 12-bit 3.25 Msps ADC Module with 3 ADC Cores
Three PWM Generators - two outputs per generator
Two Rail-to-Rail Comparators with Hysteresis
Two Programmable Gain Amplifiers (PGAs)
One UART module
One 4-Wire SPI module
One I2C module (up to 1 Mbaud) with SMBus Support